Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a semiconductor memory cell and to a semiconductor memory device formed therefrom.
In semiconductor memory devices, a multiplicity of semiconductor memory cells are combined in a memory area. An objective of the further development of modern semiconductor memory technologies is, inter alia, to improve the operational reliability and to increase the integration density of the memory cells in the memory devices.
An alternative way of realizing very favorable semiconductor memory cells and semiconductor memory devices that can be processed in a simple manner consists in departing from silicon technology, which is complicated and capital-intensive, and employing very much simpler fabrication methods, for example by printing on the structures. The economic compulsion toward extreme miniaturization of the components is obviated in this case. Attention is in this case paid in particular to improving nonvolatile memory mechanisms and to the integration thereof.
It is problematic in the case of prior art nonvolatile memory mechanisms that the access to each individual memory cell is effected via corresponding electrical signals; these can also have the effect that the memory contents are in the process changed inadvertently by the corresponding electrical access signals.
It is accordingly an object of the invention to provide a semiconductor memory cell and a semiconductor memory device, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provides for a semiconductor memory cell in which information can be stored in nonvolatile form, and in which the memory cell can be accessed without any change to the information or loss of information.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor memory cell, comprising:
a field-effect transistor device forming an access device, the field-effect transistor device having first and second source/drain regions, a channel region, comprising or consisting of an organic semiconductor material, between the first and second source/drain regions, and a gate electrode configuration; and
a storage capacitor having a ferroelectric storage dielectric and at least one electrode forming a first gate electrode of the gate electrode configuration of the field-effect transistor device.
In other words, the objects of the invention are achieved with a semiconductor memory cell that has a field-effect transistor device as access device, which has a channel region with or made of an organic semiconductor material between a first and a second source/drain region. Furthermore, a storage capacitor is provided, which has a ferroelectric storage dielectric and at least one electrode, which functions as a first gate electrode of a gate electrode configuration of the field-effect transistor device.
A first central concept of the present invention is the provision of an organic semiconductor material in the channel region of the field-effect transistor device. Organic semiconductor materials are particularly suitable for particular applications in which large scale integration is not required and for which a mechanically flexible substrate is of value, for example in ID tags, smart cards, or the like. The outstanding properties are essentially based on the possibility of a mechanically flexible substrate material and also on the relatively low costs of such materials and the low costs of the methods used for processing these materials.
In accordance with a preferred embodiment of the invention, furthermore, a selection gate electrode of the gate electrode configuration is provided, by means of which the field-effect transistor device can be switched off and/or, if appropriate, switched on in a defined and controllable manner, to be precise substantially without influencing the storage dielectric and/or substantially independently of the first gate electrode.
A further central idea of the present invention thus consists in forming a selection gate electrode in a form which is independent of the first gate electrode, by means of which the field-effect transistor device can be switched off and/or, if appropriate, switched on in a defined and controllable manner, without influencing the storage dielectric. What is thereby achieved is that an access to the field-effect transistor device can be interrupted in a defined manner, so that a signal current that has been detected, if appropriate, in the case of an arrangement of a plurality of memory cells according to the invention, can originate exclusively from selected semiconductor memory cells, because the respective nonselected memory cells make no contribution to the measurement current and thus to the signal current. Upon the application of a corresponding electrical potential difference and with respect to the channel zone or channel region, the selection gate electrode for switching off the field-effect transistor device in a defined manner exerts essentially no electromagnetic influence on the storage dielectric, so that the electromagnetic material properties of the storage dielectric, for example the state of polarization, are not influenced thereby. The information state corresponding to the electromagnetic material state of the storage dielectric thus remains untouched and is preserved, so that the information is not lost or changed even in the event of random access as a result of the switching-on or switching-off of the field-effect transistor device.
In accordance with a further embodiment of the semiconductor memory cell according to the invention, it is provided that, in this case, different information states can be represented and/or detected as different electric currents flowing for a given electrical potential difference between the source/drain regions via the respective channel region.
In this case, it is furthermore provided that the current via the channel region can be influenced by means of states of polarization of the ferroelectric storage dielectric which correspond to different information states. Consequently, by means of the interlinking of the state of polarization corresponding to the informationxe2x80x94of the ferroelectric storage dielectric with the electromagnetic influencing by the state of polarization on the channel region, the detection or signal current that is to be measured, if appropriate, is influenced, as a result of which the information stored as a state of polarization in the storage capacitor actually becomes able to be read out toward the outside.
In accordance with another embodiment of the semiconductor memory cell according to the invention, it is provided that the gate electrode configuration is electrically insulated from the source/drain regions and the channel region by at least one insulation region. This is one of the basic preconditions for the functioning of the semiconductor memory cell formed in an integrated manner with a field-effect transistor device and a storage capacitor.
In a particularly preferred embodiment of the semiconductor memory cell according to the invention, the ferroelectric storage dielectric or a part thereof is provided as or in a region between the channel region and the first gate electrode of the gate electrode configuration. This can be done in particular by the ferroelectric storage dielectric or a part thereof being formed either altogether as the insulation region or as part thereof.
In another embodiment, the ferroelectric storage dielectric is formed in direct proximity or in contact with the channel region, at least one or both source/drain regions, the first gate electrode and/or the selection gate electrode. This results in a particularly compact and space-saving design of the semiconductor memory cell according to the invention, and the contact between the individual materials is noncritical as long as the respective insulation conditions are complied with and no chemical or electrochemical conversion processes which modify the morphological structure and thus the functioning of the semiconductor memory cell according to the invention occur at the contact areas or interfaces.
In another embodiment of the semiconductor memory cell according to the invention, it is provided that, with regard to a first direction given by the arrangement of the source/drain regions and of the channel region, the first gate electrode and the selection gate electrode are at a very small lateral distance from one another. This means, for example, that the first gate electrode and the selection gate electrode lie very close together without touching and/or without being in contact with one another, so that these two electrodes are spatially closely adjacent to one another in order to ensure a compact design, and, at the same time, remain able to be electrically driven independently of one another.
Furthermore, it may be provided that, with regard to the first direction defined above, the first gate electrode and the selection gate electrode are arranged vertically offset with respect to one another.
In this case, it is provided, in particular, that the selection gate electrode is disposed on a side of the insulation region which faces the channel region and/or the source/drain regions, in particular in electrically insulated form.
In another embodiment of the semiconductor memory cell according to the invention, a second gate electrode of the gate electrode configuration is provided. The second gate electrode functions, in particular, as a second capacitor electrode and/or as an electrode which influences the ferroelectric storage dielectric.
Preferably, the second gate electrode may be formed as a free electrode or as a floating gate. However, it is also conceivable for the second gate electrode of the gate electrode configuration to be contact-connected separately and to have an individual electrical potential applied to it in order to influence the ferroelectric storage dielectric correspondingly.
It is particularly advantageous in this case if the ferroelectric storage dielectric or a part thereof is formed directly between the first and second gate electrodes. As a result, the electromagnetic state, for example the state of polarization, of the storage dielectric can be influenced in a particularly direct and simple manner.
In this case, it is furthermore provided that the second gate electrode is formed on a side of the channel region and/or of the source/drain regions which is remote from the first gate electrode. In accordance with this arrangement, the first gate electrode and the second gate electrode are opposite one another with regard to the insulation region, the channel region and/or the source/drain regions, the latter being arranged between the first gate electrode and the second gate electrode.
In principle, all material combinations are conceivable with regard to the material of the channel region and also with regard to the storage dielectric, as long as the material of the channel region is only an organic semiconductor or the like and as long as the material of the storage dielectric essentially has ferroelectric properties for realizing the memory mechanism.
In accordance with again a further feature of the invention, the ferroelectric storage dielectric has or is formed from an inorganic material, for example strontium bismuth tantalate SBT, lead zirconium titanate PZT and/or the like. Organic materials are also conceivable, for example a polymeric ferroelectric based on polyvinylidene difluoride PVDF, polytrifluoroethylene PTrFE and/or the like. Mixtures, compounds or derivatives of these substances or the copolymers or terpolymers thereof are also conceivable.
With regard to the organic semiconductor material for the channel region, it is provided that p-type semiconductors based on condensed aromatic compounds are used, there, use being made of, in particular, anthracenes, tetracenes, pentacenes and/or the like, polythiophenes, for example poly-3-alkylthiophenes, polyvinylthiophenes and/or the like, polypyrroles, organometallic complexes of phthalocyanines, porphyrins, in particular of copper and/or the like.
Furthermore, it is advantageous that an, in particular, flexible, substrate is provided, in particular using metals, for example copper, nickel, gold, iron sheet and/or the like, plastics, for example polystyrene, polyethylene, polyester, polyurethane, polycarbonate, polyacrylate, polyimide, polyether, polybenzoxazole and/or the like, paper and/or the like.
With the above and other objects in view there is also provided, in accordance with the invention, a semiconductor memory device formed with a plurality or multiplicity of the above-summarized memory cells.
In this case, various contact connections of the respective source/drain regions and/or gate regions may be provided.
In accordance with a particularly advantageous development of the semiconductor memory device according to the invention, it is provided that a connection of the source/drain regions and/or of the gate regions of a given semiconductor memory cell to other semiconductor memory cells of the semiconductor memory device, preferably in a matrix arrangement, is effected by direct connection of the respective conductive regions.
As an alternative or in addition, it may be provided that the connection of a given semiconductor memory cell of the semiconductor memory device with regard to the source/drain regions and/or the gate regions to other cells of the semiconductor memory device is realized by means of an additional metal track or metallization and optionally provided corresponding contacts.
The dielectric region may be formed either from an organic material or from an inorganic material or from materials of this type.
Appropriate inorganic materials are chalcogenides, silicon dioxide, silicon nitride, aluminum oxide, zinc oxide, hafnium oxide and/or the like and/or mixtures and/or compounds thereof.
In the case of the organic materials, monolayers or films of finite thickness are also appropriate, by way of example. Examples of preferred materials here are polymers, polystyrene, polyethylene, polyester, polyurethane, polycarbonate, polyacrylate, polyimide, polyether, polybenzoxazoles and/or the like and/or mixtures or compounds thereof.
For optionally provided insulation regions, too, various, in particular the same, materials or material combinations are provided, for example inorganic compounds, in particular made of silicon dioxide, silicon nitride, aluminum oxide, zinc oxide, hafnium oxide and/or the like and/or mixtures and/or compounds thereof.
Organic compounds are also conceivable, in particular polymers, polystyrene, polyethylene, polyester, polyurethane, polycarbonate, polyacrylate, polyimide, polyether, polybenzoxazoles and/or the like and/or mixtures or compounds thereof.
Electronics based on organic or organometallic compounds is discussed for applications, e.g. ID tags, smart cards, etc., which are subject to considerably lower performance requirements in comparison with chips fabricated from silicon. The price permitted for these systems can no longer be achieved by silicon-based electronics.
In the material development of volatile and nonvolatile memories based on organic polymers and molecules (also organometallic), e.g. materials based on PVDF (polyvinylidene difluoride) are suitable as memory materials. In particular, the copolymer with trifluoroethylene PVDF-PTrFE; 70:30 exhibits the properties sufficient for a memory application of medium to low density.
The ferroelectricity of this material class can be utilized for memory applications.
This invention describes, inter alia, a component which can be integrated in circuits with organic semiconductors and which couples a ferroelectric capacitor directly to a field-effect transistor. In the case of a component of this type, the problem arises that, on account of the ferroelectric hysteresis, the gate voltage can only be varied in a very limited range without varying the content of the memory cells.
However, the procedure according to the invention affords the following advantages, in particular:
The ferroelectricity of PVDF-based polymers is utilized according to the invention in order to construct a polymer-based rewritable, nonvolatile memory element. The known inorganic ferroelectrics PZT or SBT can also be used as an alternative.
This component contains, according to the invention, a first built-in transistor function to which the ferroelectric material is directly coupled, and a second built-in transistor function which is arranged in series therewith and permits the channel to be switched off independently of the state of the ferroelectric.
The gate electrode and a capacitor electrode of the memory element are fabricated in one step.
The operating point of the ferrocapacitor can be adapted to the polymer-based transistors by varying the layer thickness (1-50 V, preferably 5-15 V).
The size of the ferrocapacitor is noncritical since inexpensive substrate material (polymer films, paper) is worked with and the price is not determined by the chip size.
The signal swing for read/write can be controlled by way of the size of the ferrocapacitor, i.e. scaling problems do not occur (1-100 xcexcm2)
The nondestructive read-out is effected via the state of the integrated transistor (ON-OFF).
Writing is effected by means of the capacitor/gate electrodes.
One inventive aspect resides in the construction of a polymer-based component which contains a ferroelectric capacitor with an integrated transistor and an additional control electrode.
In an exemplary basic version of the component proposed, a ferrocapacitor is prescribed, comprising two electrodes and the ferroelectric dielectric. One electrode simultaneously forms the gate electrode of the field-effect transistor constructed above that. The further components of the transistor are formed by the gate dielectric, the source electrode and the drain electrode. The channel of the memory transistor is formed in an organic semiconductor in the region near the interface with the gate dielectric in the region lying above the capacitor electrode. An additional selection electrode allows the formation of a second channel region at the surface of the semiconductor.
In order to explain the functioning, it is assumed that the organic semiconductor is formed from the p-type channel material pentacene. The ferrocapacitor is polarized such that the negative polarization charge is situated at the second electrode, while the positive polarization charge is situated at the first electrode. After a corresponding potential gradient has been applied to the source and drain electrodes, current flows since the transistor is in the on state. This switching state can be repeatedly read out as long as the polarization is not changed. The current flow can then be modulated on the one hand by the state of the ferroelectric (memory effect) and on the other hand by the additional selection electrode. With the selection electrode, it can thus be ensured according to the invention that, in a matrix arrangement, the cells which are not intended to be read do not contribute to the current flow.
In one variant of the memory cell, the ferroelectric is utilized directly as gate dielectric of the memory transistor.
This results in a better coupling of the polarization charge into the channel of the memory transistor. However, this variant has the disadvantage that, on account of the lack of a second capacitor electrode, channel and contact region of the transistor have to be used as counterelectrode during writing. Since this can lead to problemsxe2x80x94depending on the precise dimensioning of the componentxe2x80x94during writing, an arrangement with an additional electrode and additional gate dielectric at the rear side of the transistor is proposed. The additional electrode can be utilized as counterelectrode during writing. In contrast to the arrangement described above, higher write voltages are required, since the active transistor region rep resents a series capacitance across which a part of the applied voltage is dropped.
Finally, the ferroelectric can also be used as gate dielectric of the selection transistor. This arrangement is distinguished by a particularly simple process implementation. With the use of inorganic ferroelectrics, such as, e.g. PZT or SBT, the advantage of a very high gate capacitance is furthermore afforded on account of the very high dielectric constant (a few 100) of these materials. As a result, the selection element can be switched with comparatively low voltages.
The following materials are conceivable:
The substrate materials used are highly diverse. Examples that may be mentioned here are flexible films made of metal (copper, nickel, gold, iron sheet, etc.), plastics (polystyrene, polyethylene, polyester, polyurethanes, polycarbonates, polyacrylates, polyimides, polyether, polybenzoxazoles, etc.) or paper. Suitable organic semiconductors are the p-type semiconductors based on condensed aromatic compounds (anthracene, tetracene, pentacene), polythiophene (poly-3-alkylthiophenes, polyvinylthiophene), polypyrroles or the organometallic complexes (Cu) of phthalocyanine or porphyrin.
Polymeric ferroelectrics based on fluorinated polyenes, such as polyvinylidene difluoride, polytrifluoroethylenes, or the copolymers or terpolymers thereof, are particularly suitable on account of their chemical stability or their good processability. Further possible materials in this class are e.g. polyvinyl chloride, the copolymer vinyl acetate/vinylidene cynanide, polyacrylonitride, polyparaxylylene, nylon and/or the like. Inorganic materials such as SBT (strontium bismuth tantalate) or PZT (lead zirconium titanate) in a thin layer are equally suitable.
The dielectrics may be either of inorganic or of organic nature.
The integration of the inorganic dielectrics silicon dioxide or silicon nitride has been successfully demonstrated. Aluminum oxide, zinc oxide, zirconium oxide, hafnium oxide and/or the like are also suitable.
The organic dielectrics such as polystyrene, polyethylene, polyester, polyurethanes, polycarbonates, polyacrylates, polyimides, polyether, polybenzoxazoles and/or the like are particularly suitable owing to their potential printability.
For the fabrication of the electrodes and connecting lines between the cells and transistors, metals (Pd, Au, Pt, Ni, Cu, Ti, etc.) are suitable on account of their low nonreactive resistance. For less stringent demands, it is also possible to use organic doped semiconductors such as camphorsulfonic-acid-doped polyaniline or polystyrenesulfonic-acid-doped polythiophenes and/or the like.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor memory cell and semiconductor memory device, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.